NRF24L01 Wireless 2.4G Control Module
The NRF24L01 is a single-chip transceiver operating in the 2.4-2.5GHz world-wide ISM band. It uses a 4-wire SPI communication port with communication rates up to 8Mbps, suitable for connecting with various MCUs, and is easy to program. Output power, channel selection, and protocol settings can be configured through the SPI interface with extremely low current consumption. When operating in transmit mode at 6dBm transmit power, the current consumption is 9.0mA; in receive mode it is 12.3mA. Current consumption in power-down mode and standby mode is even lower.
Module Source
Purchase link: https://item.taobao.com/item.htm?spm=a1z09.2.0.0.2f042e8dSu55YD&id=609297351472&_u=j2t4uge5fa1d Materials download link: https://pan.baidu.com/s/1CUQ3SOdnmD8xSXMdR4YopA Materials extraction code: 1234
Specifications
Operating voltage: 1.9~3.6V Supply current: 900~12.3mA Maximum data transfer rate: 2000 Kbps Control method: SPI Number of pins: 8 Pin (2.54mm pitch pin header)
View Materials
Reception method
The receiving end of the NRF24L01 uses the IRQ pin for judgment. When IRQ is high, it means data has been received; when IRQ is 1, it is waiting for data. Therefore, the reception method can be determined based on the IRQ pin. Both polling and interrupt methods are provided here.
Polling reception
Using the polling method will block the execution of other tasks, because receiving data requires constantly judging whether the IRQ pin is high, which will continuously occupy MCU time. In order to solve the problem of hanging when no data is received and prevent missing data reception, a timeout judgment is added during the process of waiting for data. When no data is received within a certain period of time, the waiting for reception ends and other tasks are executed.
Interrupt reception
Using the interrupt method to receive data is achieved by setting the IRQ pin as an external interrupt function.
When a change is detected on the IRQ pin, data is received. According to the requirements of the 24L01, after receiving data, the received FIFO must be cleared.
Porting Process
Pin Selection
Port to Project
Our goal is to port the example to the ESP32-S3 dev board. Complete driver code has been provided for you. Follow the steps below to complete the porting.
For detailed instructions on creating folders and new .c and .h files, refer to section 1.4.2 in the [DHT11 Temperature and Humidity Sensor] chapter; we will not repeat it here.
However, here we replace the file names bsp_dht11.c and bsp_dht11.h with NRF24L01.c and NRF24L01.h, and change the folder name to NRF24L01. We have two extra steps: create another folder: in the SPI folder, create two new files: drv_spi.h and drv_spi.c
In the main folder, create a new file: main.h
In the CMakeLists.txt file in the main folder, write:
Write Code
In the file main.h, write the following code.
Set RECEIVING_MODE to 1 or 0 to switch between the receiver and transmitter.
#ifndef __MAIN_H__
#define __MAIN_H__
// If using hardware SPI, comment out the macro __USE_SOFT_SPI_INTERFACE__; if using software SPI, you need to define this macro.
#define __USE_SOFT_SPI_INTERFACE__
#define RECEIVING_MODE 1 //Whether to use receive mode 1=use receive mode 0=use transmit mode
#endif2
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In the file drv_spi.c, write the following code.
#include "drv_spi.h"
#include "stdlib.h"
#include "string.h"
void delay_ms(unsigned int ms)
{
vTaskDelay(ms / portTICK_PERIOD_MS);
}
void delay_us(unsigned int us)
{
ets_delay_us(us);
}
void delay_1ms(unsigned int ms)
{
vTaskDelay(ms / portTICK_PERIOD_MS);
}
void delay_1us(unsigned int us)
{
ets_delay_us(us);
}
#ifndef __USE_SOFT_SPI_INTERFACE__
/** Hardware SPI */
#define SPI_WAIT_TIMEOUT ((uint16_t)0xFFFF)
spi_device_handle_t spi2_handle;
/**
* @brief: SPI initialization (hardware)
* @param: None
* @note: None
* @retval: None
*/
void drv_spi_init(void)
{
esp_err_t ret;
spi_bus_config_t buscfg={
.miso_io_num=SPI_MISO_GPIO_PIN,
.mosi_io_num=SPI_MOSI_GPIO_PIN,
.sclk_io_num=SPI_CLK_GPIO_PIN,
.quadwp_io_num=-1,
.quadhd_io_num=-1,
.max_transfer_sz= 512 //Maximum transfer size
};
spi_device_interface_config_t devcfg={
.clock_speed_hz=80*1000*1000, //Clock out at 80 MHz
.mode=3, //SPI mode 3
.spics_io_num=-1, //CS pin
.queue_size=7, //Transaction queue size 7
.pre_cb=NULL, // Callback before data transfer, used for D/C (data command) line handling
};
// Initialize SPI bus
ret=spi_bus_initialize(SPI2_HOST, &buscfg, SPI_DMA_CH_AUTO);
ESP_ERROR_CHECK(ret);
// Add SPI bus driver
ret=spi_bus_add_device(SPI2_HOST, &devcfg, &spi2_handle);
ESP_ERROR_CHECK(ret);
}
/**
* @brief: SPI send/receive a single byte
* @param:
* @TxByte: Data byte to send
* @note: Non-blocking, will exit automatically once wait timeout occurs
* @retval: Received byte
*/
uint8_t drv_spi_read_write_byte( uint8_t TxByte )
{
// spi_set_nss_low();
uint8_t data = 0;
esp_err_t ret;
spi_transaction_t t={0};
t.length=1*8; // Data length Len is the number of bytes, len, transaction length is in bits.
t.tx_buffer=&TxByte; // Write data pointer
t.rx_buffer=&data; // Read data storage
t.user=(void*)1; // Set D/C line, handle DC signal in the pre-SPI transfer callback based on this value
ret=spi_device_polling_transmit(spi2_handle, &t); // Start transfer
assert(ret==ESP_OK); // Generally no problems
// spi_set_nss_high();
return data;
}
/**
* @brief: SPI send/receive string
* @param:
* @ReadBuffer: Receive data buffer address
* @WriteBuffer: Send byte buffer address
* @Length: Byte length
* @note: Non-blocking, will exit automatically once wait timeout occurs
* @retval: None
*/
void drv_spi_read_write_string( uint8_t* ReadBuffer, uint8_t* WriteBuffer, uint16_t Length )
{
spi_set_nss_low( );//Pull chip select low
while( Length-- )
{
*ReadBuffer = drv_spi_read_write_byte( *WriteBuffer ); //Send/receive data
ReadBuffer++;
WriteBuffer++; //Read/write address increment by 1
}
spi_set_nss_high( );//Pull chip select high
}
/** Hardware SPI */
#endif
#ifdef __USE_SOFT_SPI_INTERFACE__
/** Software SPI */
/**
* @brief: SPI initialization (software)
* @param: None
* @note: None
* @retval: None
*/
void drv_spi_init( void )
{
gpio_config_t out_config = {
.pin_bit_mask = (1ULL<<SPI_CLK_GPIO_PIN)|(1ULL<<SPI_MOSI_GPIO_PIN)|(1ULL<<SPI_NSS_GPIO_PIN), //Configure pins
.mode =GPIO_MODE_OUTPUT, //Output mode
.pull_up_en = GPIO_PULLUP_DISABLE, //Disable pull-up
.pull_down_en = GPIO_PULLDOWN_DISABLE, //Disable pull-down
.intr_type = GPIO_INTR_DISABLE //Disable pin interrupt
};
gpio_config(&out_config);
gpio_config_t in_config = {
.pin_bit_mask = (1ULL<<SPI_MISO_GPIO_PIN), //Configure pins
.mode =GPIO_MODE_INPUT, //Output mode
.pull_up_en = GPIO_PULLUP_ENABLE, //Enable pull-up
.pull_down_en = GPIO_PULLDOWN_DISABLE, //Disable pull-down
.intr_type = GPIO_INTR_DISABLE //Disable pin interrupt
};
gpio_config(&in_config);
}
/**
* @brief: SPI send/receive a single byte
* @param:
* @TxByte: Data byte to send
* @note: Non-blocking, will exit automatically once wait timeout occurs
* @retval: Received byte
*/
uint8_t drv_spi_read_write_byte( uint8_t TxByte )
{
uint8_t i = 0, Data = 0;
spi_set_clk_low( );
for( i = 0; i < 8; i++ ) //One byte has 8 bits, needs to loop 8 times
{
/** Send */
if( 0x80 == ( TxByte & 0x80 ))
{
spi_set_mosi_hight( ); //If the bit to send is 1, set the IO pin high
}
else
{
spi_set_mosi_low( ); //If the bit to send is 0, set the IO pin low
}
TxByte <<= 1; //Data shift left by one bit, MSB is sent first
spi_set_clk_high( ); //Set clock line high
delay_us(2);
/** Receive */
Data <<= 1; //Received data shift left by one bit, MSB is received first
if( 1 == spi_get_miso( ))
{
Data |= 0x01; //If the IO pin is high during reception, it is considered that 1 was received
}
spi_set_clk_low( ); //Set clock line low
delay_us(2);
}
return Data; //Return received byte
}
/**
* @brief: SPI send/receive string
* @param:
* @ReadBuffer: Receive data buffer address
* @WriteBuffer: Send byte buffer address
* @Length: Byte length
* @note: Non-blocking, will exit automatically once wait timeout occurs
* @retval: None
*/
void drv_spi_read_write_string( uint8_t* ReadBuffer, uint8_t* WriteBuffer, uint16_t Length )
{
spi_set_nss_low( ); //Pull chip select low
while( Length-- )
{
*ReadBuffer = drv_spi_read_write_byte( *WriteBuffer ); //Send/receive data
ReadBuffer++;
WriteBuffer++; //Read/write address increment by 1
}
spi_set_nss_high( ); //Pull chip select high
}
/** Software SPI */
#endif2
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In drv_spi.h, modify to the following code.
#ifndef __DRV_SPI_H__
#define __DRV_SPI_H__
#include "driver/i2c.h"
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_log.h"
#include "freertos/queue.h"
#include <inttypes.h>
#include "sdkconfig.h"
#include "driver/gpio.h"
#include "esp_log.h"
#include "rom/ets_sys.h"
#include "esp_system.h"
#include "driver/gpio.h"
#include "driver/spi_master.h"
#include "driver/spi_common.h"
#include "hal/gpio_types.h"
#include "../main.h"
//SPI pin definitions
#define SPI_CLK_GPIO_PIN 4
#define SPI_MISO_GPIO_PIN 2
#define SPI_MOSI_GPIO_PIN 3
#define SPI_NSS_GPIO_PIN 5
#define spi_set_nss_high( ) gpio_set_level(SPI_NSS_GPIO_PIN, 1) //Chip select high
#define spi_set_nss_low( ) gpio_set_level(SPI_NSS_GPIO_PIN, 0) //Chip select low
#ifdef __USE_SOFT_SPI_INTERFACE__ /** Only needed when using software SPI */
#define spi_set_clk_high( ) gpio_set_level(SPI_CLK_GPIO_PIN, 1) //Clock high
#define spi_set_clk_low( ) gpio_set_level(SPI_CLK_GPIO_PIN, 0) //Clock low
#define spi_set_mosi_hight( ) gpio_set_level(SPI_MOSI_GPIO_PIN, 1) //Transmit pin high
#define spi_set_mosi_low( ) gpio_set_level(SPI_MOSI_GPIO_PIN, 0) //Transmit pin low
#define spi_get_miso( ) (gpio_get_level(SPI_MISO_GPIO_PIN) != 1) ? 0 : 1 // If the corresponding input bit is low, get 0; if high, get 1
void drv_spi_init( void );
uint8_t drv_spi_read_write_byte( uint8_t TxByte );
void drv_spi_read_write_string( uint8_t* ReadBuffer, uint8_t* WriteBuffer, uint16_t Length );
void delay_us(unsigned int us);
void delay_ms(unsigned int ms);
void delay_1us(unsigned int us);
void delay_1ms(unsigned int ms);
#else /** Only used when using hardware SPI */
void drv_spi_init(void);
uint8_t drv_spi_read_write_byte( uint8_t TxByte );
void drv_spi_read_write_string( uint8_t* ReadBuffer, uint8_t* WriteBuffer, uint16_t Length );
void delay_us(unsigned int us);
void delay_ms(unsigned int ms);
void delay_1us(unsigned int us);
void delay_1ms(unsigned int ms);
#endif
#endif2
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In NRF24L01.c, modify the following code.
#include "NRF24L01.h"
#include "stdio.h"
const char *g_ErrorString = "RF24L01 is not find !...";
void drv_delay_500Ms( unsigned int ms)
{
while(ms--)
{
delay_1ms(500);
}
}
/**
* @brief: NRF24L01 read register
* @param:
@Addr: Register address
* @note: Address is valid in the device
* @retval: Read data
*/
uint8_t NRF24L01_Read_Reg( uint8_t RegAddr )
{
uint8_t btmp;
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( NRF_READ_REG | RegAddr ); //Read command address
btmp = drv_spi_read_write_byte( 0xFF ); //Read data
RF24L01_SET_CS_HIGH( ); //Deselect chip
return btmp;
}
/**
* @brief: NRF24L01 read data of specified length
* @param:
* @reg: Address
* @pBuf: Data storage address
* @len: Data length
* @note: Data length does not exceed 255, address is valid in the device
* @retval: Read status
*/
void NRF24L01_Read_Buf( uint8_t RegAddr, uint8_t *pBuf, uint8_t len )
{
uint8_t btmp;
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( NRF_READ_REG | RegAddr ); //Read command address
for( btmp = 0; btmp < len; btmp ++ )
{
*( pBuf + btmp ) = drv_spi_read_write_byte( 0xFF ); //Read data
}
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: NRF24L01 write register
* @param: None
* @note: Address is valid in the device
* @retval: Read/write status
*/
void NRF24L01_Write_Reg( uint8_t RegAddr, uint8_t Value )
{
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( NRF_WRITE_REG | RegAddr ); //Write command address
drv_spi_read_write_byte( Value ); //Write data
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: NRF24L01 write data of specified length
* @param:
* @reg: Address
* @pBuf: Write data address
* @len: Data length
* @note: Data length does not exceed 255, address is valid in the device
* @retval: Write status
*/
void NRF24L01_Write_Buf( uint8_t RegAddr, uint8_t *pBuf, uint8_t len )
{
uint8_t i;
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( NRF_WRITE_REG | RegAddr ); //Write command address
for( i = 0; i < len; i ++ )
{
drv_spi_read_write_byte( *( pBuf + i ) ); //Write data
}
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: Clear TX buffer
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_Flush_Tx_Fifo ( void )
{
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( FLUSH_TX ); //Flush TX FIFO command
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: Clear RX buffer
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_Flush_Rx_Fifo( void )
{
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( FLUSH_RX ); //Flush RX FIFO command
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: Reuse the last packet data
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_Reuse_Tx_Payload( void )
{
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( REUSE_TX_PL ); //Reuse last packet command
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: NRF24L01 no operation
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_Nop( void )
{
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( NOP ); //No operation command
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: NRF24L01 read status register
* @param: None
* @note: None
* @retval: RF24L01 status
*/
uint8_t NRF24L01_Read_Status_Register( void )
{
uint8_t Status;
RF24L01_SET_CS_LOW( ); //Chip select
Status = drv_spi_read_write_byte( NRF_READ_REG + STATUS ); //Read status register
RF24L01_SET_CS_HIGH( ); //Deselect chip
return Status;
}
/**
* @brief: NRF24L01 clear interrupt
* @param:
@IRQ_Source: Interrupt source
* @note: None
* @retval: Status register value after clearing
*/
uint8_t NRF24L01_Clear_IRQ_Flag( uint8_t IRQ_Source )
{
uint8_t btmp = 0;
IRQ_Source &= ( 1 << RX_DR ) | ( 1 << TX_DS ) | ( 1 << MAX_RT ); //Interrupt flag processing
btmp = NRF24L01_Read_Status_Register( ); //Read status register
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( NRF_WRITE_REG + STATUS ); //Write status register command
drv_spi_read_write_byte( IRQ_Source | btmp ); //Clear corresponding interrupt flag
RF24L01_SET_CS_HIGH( ); //Deselect chip
return ( NRF24L01_Read_Status_Register( )); //Return status register state
}
/**
* @brief: Read RF24L01 interrupt status
* @param: None
* @note: None
* @retval: Interrupt status
*/
uint8_t RF24L01_Read_IRQ_Status( void )
{
return ( NRF24L01_Read_Status_Register( ) & (( 1 << RX_DR ) | ( 1 << TX_DS ) | ( 1 << MAX_RT ))); //Return interrupt status
}
/**
* @brief: Read data width in FIFO
* @param: None
* @note: None
* @retval: Data width
*/
uint8_t NRF24L01_Read_Top_Fifo_Width( void )
{
uint8_t btmp;
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( R_RX_PL_WID ); //Read FIFO data width command
btmp = drv_spi_read_write_byte( 0xFF ); //Read data
RF24L01_SET_CS_HIGH( ); //Deselect chip
return btmp;
}
/**
* @brief: Read received data
* @param: None
* @note: None
* @retval:
@pRxBuf: Data storage start address
*/
uint8_t NRF24L01_Read_Rx_Payload( uint8_t *pRxBuf )
{
uint8_t Width, PipeNum;
PipeNum = ( NRF24L01_Read_Reg( STATUS ) >> 1 ) & 0x07; //Read receive status
Width = NRF24L01_Read_Top_Fifo_Width( ); //Read number of received data
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( RD_RX_PLOAD ); //Read valid data command
for( PipeNum = 0; PipeNum < Width; PipeNum ++ )
{
*( pRxBuf + PipeNum ) = drv_spi_read_write_byte( 0xFF ); //Read data
}
RF24L01_SET_CS_HIGH( ); //Deselect chip
NRF24L01_Flush_Rx_Fifo( ); //Clear RX FIFO
return Width;
}
/**
* @brief: Send data (with ACK)
* @param:
* @pTxBuf: Send data address
* @len: Length
* @note: No more than 32 bytes at a time
* @retval: None
*/
void NRF24L01_Write_Tx_Payload_Ack( uint8_t *pTxBuf, uint8_t len )
{
uint8_t btmp;
uint8_t length = ( len > 32 ) ? 32 : len; //If data length is greater than 32, only send 32
NRF24L01_Flush_Tx_Fifo( ); //Flush TX FIFO
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( WR_TX_PLOAD ); //Send command
for( btmp = 0; btmp < length; btmp ++ )
{
drv_spi_read_write_byte( *( pTxBuf + btmp ) ); //Send data
}
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: Send data (without ACK)
* @param:
* @pTxBuf: Send data address
* @len: Length
* @note: No more than 32 bytes at a time
* @retval: None
*/
void NRF24L01_Write_Tx_Payload_NoAck( uint8_t *pTxBuf, uint8_t len )
{
if( len > 32 || len == 0 )
{
return ; //Data length greater than 32 or equal to 0, do not execute
}
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( WR_TX_PLOAD_NACK ); //Send command
while( len-- )
{
drv_spi_read_write_byte( *pTxBuf ); //Send data
pTxBuf++;
}
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: Write data to TX FIFO in receive mode (with ACK)
* @param:
* @pData: Data address
* @len: Length
* @note: No more than 32 bytes at a time
* @retval: None
*/
void NRF24L01_Write_Tx_Payload_InAck( uint8_t *pData, uint8_t len )
{
uint8_t btmp;
len = ( len > 32 ) ? 32 : len; //If data length is greater than 32, only write 32 bytes
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( W_ACK_PLOAD ); //Command
for( btmp = 0; btmp < len; btmp ++ )
{
drv_spi_read_write_byte( *( pData + btmp ) ); //Write data
}
RF24L01_SET_CS_HIGH( ); //Deselect chip
}
/**
* @brief: Set transmit address
* @param:
* @pAddr: Address storage address
* @len: Length
* @note: None
* @retval: None
*/
void NRF24L01_Set_TxAddr( uint8_t *pAddr, uint8_t len )
{
len = ( len > 5 ) ? 5 : len; //Address cannot be greater than 5 bytes
NRF24L01_Write_Buf( TX_ADDR, pAddr, len ); //Write address
}
/**
* @brief: Set receive channel address
* @param:
* @PipeNum: Channel
* @pAddr: Address storage address
* @Len: Length
* @note: Channel no greater than 5, address length no greater than 5 bytes
* @retval: None
*/
void NRF24L01_Set_RxAddr( uint8_t PipeNum, uint8_t *pAddr, uint8_t Len )
{
Len = ( Len > 5 ) ? 5 : Len;
PipeNum = ( PipeNum > 5 ) ? 5 : PipeNum; //Channel no greater than 5, address length no greater than 5 bytes
NRF24L01_Write_Buf( RX_ADDR_P0 + PipeNum, pAddr, Len ); //Write address
}
/**
* @brief: Set communication speed
* @param:
* @Speed: Speed
* @note: None
* @retval: None
*/
void NRF24L01_Set_Speed( nRf24l01SpeedType Speed )
{
uint8_t btmp = 0;
btmp = NRF24L01_Read_Reg( RF_SETUP );
btmp &= ~( ( 1<<5 ) | ( 1<<3 ) );
if( Speed == SPEED_250K ) //250K
{
btmp |= ( 1<<5 );
}
else if( Speed == SPEED_1M ) //1M
{
btmp &= ~( ( 1<<5 ) | ( 1<<3 ) );
}
else if( Speed == SPEED_2M ) //2M
{
btmp |= ( 1<<3 );
}
NRF24L01_Write_Reg( RF_SETUP, btmp );
}
/**
* @brief: Set power
* @param:
* @Speed: Speed
* @note: None
* @retval: None
*/
void NRF24L01_Set_Power( nRf24l01PowerType Power )
{
uint8_t btmp;
btmp = NRF24L01_Read_Reg( RF_SETUP ) & ~0x07;
switch( Power )
{
case POWER_F18DBM:
btmp |= PWR_18DB;
break;
case POWER_F12DBM:
btmp |= PWR_12DB;
break;
case POWER_F6DBM:
btmp |= PWR_6DB;
break;
case POWER_0DBM:
btmp |= PWR_0DB;
break;
default:
break;
}
NRF24L01_Write_Reg( RF_SETUP, btmp );
}
/**
* @brief: Set frequency
* @param:
* @FreqPoint: Frequency setting parameter
* @note: Value no greater than 127
* @retval: None
*/
void RF24LL01_Write_Hopping_Point( uint8_t FreqPoint )
{
NRF24L01_Write_Reg( RF_CH, FreqPoint & 0x7F );
}
/**
* @brief: NRF24L01 detection
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_check( void )
{
uint8_t i;
uint8_t error = 0;
uint8_t buf[5]={ 0XA5, 0XA5, 0XA5, 0XA5, 0XA5 };
uint8_t read_buf[ 5 ] = { 0 };
while( 1 )
{
NRF24L01_Write_Buf( TX_ADDR, buf, 5 ); //Write 5-byte address
NRF24L01_Read_Buf( TX_ADDR, read_buf, 5 ); //Read the written address
for( i = 0; i < 5; i++ )
{
if( buf[ i ] != read_buf[ i ] )
{
break;
}
}
if( 5 == i )
{
break;
}
else
{
error++;
if( error >= 3 )
{
break;
}
//Test error
printf("NRF24L01 ERROR FILE:NRF24L01.C LINE = %d\r\n",__LINE__);
}
drv_delay_500Ms( 4 );
}
printf("Successful configuration\r\n");
}
/**
* @brief: Set mode
* @param:
* @Mode: Mode transmit mode or receive mode
* @note: None
* @retval: None
*/
void RF24L01_Set_Mode( nRf24l01ModeType Mode )
{
uint8_t controlreg = 0;
controlreg = NRF24L01_Read_Reg( CONFIG );
if( Mode == MODE_TX )
{
controlreg &= ~( 1<< PRIM_RX );
}
else
{
if( Mode == MODE_RX )
{
controlreg |= ( 1<< PRIM_RX );
}
}
NRF24L01_Write_Reg( CONFIG, controlreg );
}
/**
* @brief: NRF24L01 sends one data packet
* @param:
* @txbuf: Start address of data to send
* @Length: Data length to send
* @note: None
* @retval:
* MAX_TX: Reached maximum retransmission count
* TX_OK: Transmission complete
* 0xFF: Other reasons
*/
uint8_t NRF24L01_TxPacket( uint8_t *txbuf, uint8_t Length )
{
uint8_t l_Status = 0;
uint16_t l_MsTimes = 0;
RF24L01_SET_CS_LOW( ); //Chip select
drv_spi_read_write_byte( FLUSH_TX );
RF24L01_SET_CS_HIGH( );
RF24L01_SET_CE_LOW( );
NRF24L01_Write_Buf( WR_TX_PLOAD, txbuf, Length ); //Write data to TX BUF 32 bytes TX_PLOAD_WIDTH
RF24L01_SET_CE_HIGH( ); //Start transmission
while( 0 != RF24L01_GET_IRQ_STATUS( ))
{
delay_ms( 5 );
// printf("error-1\r\n");
if( 500 == l_MsTimes++ ) //If not successful within 500ms, reinitialize the device
{
NRF24L01_Gpio_Init( );
RF24L01_Init( );
RF24L01_Set_Mode( MODE_TX );
break;
}
}
l_Status = NRF24L01_Read_Reg(STATUS); //Read status register
NRF24L01_Write_Reg( STATUS, l_Status ); //Clear TX_DS or MAX_RT interrupt flag
if( l_Status & MAX_TX ) //Reached maximum retransmission count
{
NRF24L01_Write_Reg( FLUSH_TX,0xff ); //Clear TX FIFO register
return MAX_TX;
}
if( l_Status & TX_OK ) //Transmission complete
{
return TX_OK;
}
return 0xFF; //Other reasons for transmission failure
}
#if RECEIVING_MODE //In receive mode
/**********************************************************
* Function Name: IRQ_gpio_config
* Function: Configure the IRQ pin of the NRF24L01 module as an external interrupt, triggered on both rising and falling edges.
* Parameters: None
* Function Return: None
* Author: LC
* Notes: None
**********************************************************/
static QueueHandle_t gpio_evt_queue = NULL;
void IRQ_gpio_config(void)
{
gpio_config_t io_conf = {};
//Falling edge interrupt
io_conf.intr_type = GPIO_INTR_NEGEDGE;
//Set GPIO0 input register
io_conf.pin_bit_mask = RF24L01_IRQ_GPIO_PIN;
//Input mode
io_conf.mode = GPIO_MODE_INPUT;
//Enable pull-up mode
io_conf.pull_up_en = 1;
io_conf.pull_down_en = 0;
gpio_config(&io_conf);
//Create a queue to handle gpio events from isr
gpio_evt_queue = xQueueCreate(10, sizeof(uint32_t));
//Register interrupt service
gpio_install_isr_service(ESP_INTR_FLAG_EDGE);
//Set GPIO interrupt service function
gpio_isr_handler_add(RF24L01_IRQ_GPIO_PIN, BSP_IRQ_EXTI_IRQHANDLER, (void*) RF24L01_IRQ_GPIO_PIN);
//Enable GPIO module interrupt signal
gpio_intr_enable(RF24L01_IRQ_GPIO_PIN);
//Create a button detection task
xTaskCreate(gpio_get_irq_task, //Task function
"gpio_get_irq_task", //Task name
2048, //Task stack
NULL, //Parameters passed to the task function
10, //Task priority
NULL //Task handle
);
}
/**
* @brief: RF24L01 pin initialization
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_Gpio_Init( void )
{
gpio_config_t out_config = {
.pin_bit_mask = (1ULL<<RF24L01_CE_GPIO_PIN), //Configure pin
.mode =GPIO_MODE_OUTPUT, //Output mode
.pull_up_en = GPIO_PULLUP_DISABLE, //Disable pull-up
.pull_down_en = GPIO_PULLDOWN_DISABLE, //Disable pull-down
.intr_type = GPIO_INTR_DISABLE //Disable pin interrupt
};
gpio_config(&out_config);
gpio_config_t in_config = {
.pin_bit_mask = (1ULL<<RF24L01_IRQ_GPIO_PIN), //Configure pin
.mode =GPIO_MODE_INPUT, //Output mode
.pull_up_en = GPIO_PULLUP_ENABLE, //Enable pull-up
.pull_down_en = GPIO_PULLDOWN_DISABLE, //Disable pull-down
.intr_type = GPIO_INTR_DISABLE //Disable pin interrupt
};
gpio_config(&in_config);
//IRQ external interrupt mode
IRQ_gpio_config();
RF24L01_SET_CE_LOW( );
RF24L01_SET_CS_HIGH( );
}
//Receive data buffer, maximum receive 250 characters (adjust according to your situation
uint8_t g_RF24L01RxBuffer[250];
/**********************************************************
* Function Name: BSP_IRQ_EXTI_IRQHANDLER
* Function: Interrupt handler function
* Parameters: None
* Function Return: None
* Author: LC
* Notes: None
**********************************************************/
void IRAM_ATTR BSP_IRQ_EXTI_IRQHANDLER(void* arg)
{
uint32_t gpio_num = (uint32_t) arg;
xQueueSendFromISR(gpio_evt_queue, &gpio_num, NULL);
}
//Detection task
void gpio_get_irq_task(void)
{
uint32_t io_num;
while(1)
{
//Read the latest gpio_evt_queue message
if(RF24L01_GET_IRQ_STATUS())
{
NRF24L01_RxPacket(g_RF24L01RxBuffer); //Receive data
//Test whether the received data is consistent with the sent data
// printf("data = %s",g_RF24L01RxBuffer );//Output data
}
delay_ms(50);
}
}
/**
* @brief: NRF24L01 receive data
* @param:
* @rxbuf: Receive data storage address
* @note: None
* @retval: Number of received data
*/
uint8_t NRF24L01_RxPacket( uint8_t *rxbuf )
{
uint8_t l_Status = 0, l_RxLength = 0, l_100MsTimes = 0;
l_Status = NRF24L01_Read_Reg( STATUS ); //Read status register
NRF24L01_Write_Reg( STATUS,l_Status ); //Clear interrupt flag
if( l_Status & RX_OK) //Data received
{
l_RxLength = NRF24L01_Read_Reg( R_RX_PL_WID ); //Read number of received data
NRF24L01_Read_Buf( RD_RX_PLOAD,rxbuf,l_RxLength ); //Received data
NRF24L01_Write_Reg( FLUSH_RX,0xff ); //Clear RX FIFO
return l_RxLength;
}
return 0; //No data received
}
#else //Transmit mode
/**
* @brief: RF24L01 pin initialization
* @param: None
* @note: None
* @retval: None
*/
void NRF24L01_Gpio_Init( void )
{
gpio_config_t out_config = {
.pin_bit_mask = (1ULL<<RF24L01_CE_GPIO_PIN), //Configure pin
.mode =GPIO_MODE_OUTPUT, //Output mode
.pull_up_en = GPIO_PULLUP_DISABLE, //Disable pull-up
.pull_down_en = GPIO_PULLDOWN_DISABLE, //Disable pull-down
.intr_type = GPIO_INTR_DISABLE //Disable pin interrupt
};
gpio_config(&out_config);
gpio_config_t in_config = {
.pin_bit_mask = (1ULL<<RF24L01_IRQ_GPIO_PIN), //Configure pin
.mode =GPIO_MODE_INPUT, //Output mode
.pull_up_en = GPIO_PULLUP_ENABLE, //Enable pull-up
.pull_down_en = GPIO_PULLDOWN_DISABLE, //Disable pull-down
.intr_type = GPIO_INTR_DISABLE //Disable pin interrupt
};
gpio_config(&in_config);
RF24L01_SET_CE_LOW( );
RF24L01_SET_CS_HIGH( );
}
#endif
/**
* @brief: RF24L01 module initialization
* @param: None
* @note: None
* @retval: None
*/
void RF24L01_Init( void )
{
uint8_t addr[5] = {INIT_ADDR};
RF24L01_SET_CE_HIGH( );
NRF24L01_Clear_IRQ_Flag( IRQ_ALL );
#if DYNAMIC_PACKET == 1
NRF24L01_Write_Reg( DYNPD, ( 1 << 0 ) ); //Enable dynamic data length for channel 1
NRF24L01_Write_Reg( FEATRUE, 0x07 );
NRF24L01_Read_Reg( DYNPD );
NRF24L01_Read_Reg( FEATRUE );
#elif DYNAMIC_PACKET == 0
L01_WriteSingleReg( L01REG_RX_PW_P0, FIXED_PACKET_LEN ); //Fixed data length
#endif //DYNAMIC_PACKET
NRF24L01_Write_Reg( CONFIG, /*( 1<<MASK_RX_DR ) |*/ //Receive interrupt*/
( 1 << EN_CRC ) | //Enable CRC 1 byte
( 1 << PWR_UP ) ); //Turn on device
NRF24L01_Write_Reg( EN_AA, ( 1 << ENAA_P0 ) ); //Channel 0 auto ACK
NRF24L01_Write_Reg( EN_RXADDR, ( 1 << ERX_P0 ) ); //Channel 0 receive
NRF24L01_Write_Reg( SETUP_AW, AW_5BYTES ); //Address width 5 bytes
NRF24L01_Write_Reg( SETUP_RETR, ARD_4000US |
( REPEAT_CNT & 0x0F ) ); //Repeat wait time 250us
NRF24L01_Write_Reg( RF_CH, 00 ); //Initialize channel
NRF24L01_Write_Reg( RF_SETUP, 0x26 );
NRF24L01_Set_TxAddr( &addr[0], 5 ); //Set TX address
NRF24L01_Set_RxAddr( 0, &addr[0], 5 ); //Set RX address
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In NRF24L01.h, modify to the following code.
#ifndef __NRF24L01_H__
#define __NRF24L01_H__
#include "drv_spi.h"
#include "../main.h"
/** Configuration and option definitions */
#define DYNAMIC_PACKET 1 //1: Dynamic packet, 0: Fixed
#define FIXED_PACKET_LEN 32 //Packet length
#define REPEAT_CNT 15 //Repeat count
#define INIT_ADDR 0x34,0x43,0x10,0x10,0x01
/** RF24L01 hardware interface definitions */
#define RF24L01_CE_GPIO_PIN 6
#define RF24L01_IRQ_GPIO_PIN 1
#define RF24L01_CS_GPIO_PIN 5
/** Port line operation function definitions */
#define RF24L01_SET_CE_HIGH( ) gpio_set_level(RF24L01_CE_GPIO_PIN, 1)
#define RF24L01_SET_CE_LOW( ) gpio_set_level(RF24L01_CE_GPIO_PIN, 0)
#define RF24L01_SET_CS_HIGH( ) spi_set_nss_high( )
#define RF24L01_SET_CS_LOW( ) spi_set_nss_low( )
#define RF24L01_GET_IRQ_STATUS( ) (gpio_get_level(RF24L01_IRQ_GPIO_PIN) != 1) ? 0 : 1 //IRQ status
typedef enum ModeType
{
MODE_TX = 0,
MODE_RX
}nRf24l01ModeType;
typedef enum SpeedType
{
SPEED_250K = 0,
SPEED_1M,
SPEED_2M
}nRf24l01SpeedType;
typedef enum PowerType
{
POWER_F18DBM = 0,
POWER_F12DBM,
POWER_F6DBM,
POWER_0DBM
}nRf24l01PowerType;
/** NRF24L01 definitions */
//////////////////////////////////////////////////////////////////////////////////////////////////////////
//Register operation commands
#define NRF_READ_REG 0x00 //Read configuration register, lower 5 bits are register address
#define NRF_WRITE_REG 0x20 //Write configuration register, lower 5 bits are register address
#define RD_RX_PLOAD 0x61 //Read RX valid data, 1~32 bytes
#define WR_TX_PLOAD 0xA0 //Write TX valid data, 1~32 bytes
#define FLUSH_TX 0xE1 //Clear TX FIFO register, used in transmit mode
#define FLUSH_RX 0xE2 //Clear RX FIFO register, used in receive mode
#define REUSE_TX_PL 0xE3 //Reuse last packet data, CE high, packet is sent continuously
#define R_RX_PL_WID 0x60
#define NOP 0xFF //No operation, can be used to read status register
#define W_ACK_PLOAD 0xA8
#define WR_TX_PLOAD_NACK 0xB0
//SPI(NRF24L01) register addresses
#define CONFIG 0x00 //Configuration register address; bit0:1=receive mode,0=transmit mode;bit1:power selection;bit2:CRC mode;bit3:CRC enable;
//bit4:interrupt MAX_RT (max retransmission interrupt) enable;bit5:interrupt TX_DS enable;bit6:interrupt RX_DR enable
#define EN_AA 0x01 //Enable auto-ACK function bit0~5 correspond to channels 0~5
#define EN_RXADDR 0x02 //Receive address enable bit0~5 correspond to channels 0~5
#define SETUP_AW 0x03 //Set address width (all data channels) bit0~1: 00=3 bytes, 01=4 bytes, 02=5 bytes
#define SETUP_RETR 0x04 //Set auto retransmission; bit0~3:auto retransmission counter; bit4~7:auto retransmission delay 250*x+86us
#define RF_CH 0x05 //RF channel, bit0~6 working channel frequency
#define RF_SETUP 0x06 //RF register; bit3:transmission rate(0:1M 1:2M);bit1~2:transmit power;bit0:noise amplifier gain
#define STATUS 0x07 //Status register; bit0:TX FIFO full flag; bit1~3:receive data channel number(max:6); bit4:reached max retransmission count
//bit5:data transmission complete interrupt; bit6:receive data interrupt
#define MAX_TX 0x10 //Reached max transmission count interrupt
#define TX_OK 0x20 //TX transmission complete interrupt
#define RX_OK 0x40 //Data received interrupt
#define OBSERVE_TX 0x08 //Transmit observation register; bit7~4:packet loss counter; bit3~0:retransmission counter
#define CD 0x09 //Carrier detection register; bit0:carrier detection
#define RX_ADDR_P0 0x0A //Data channel 0 receive address, max length 5 bytes, low byte first
#define RX_ADDR_P1 0x0B //Data channel 1 receive address, max length 5 bytes, low byte first
#define RX_ADDR_P2 0x0C //Data channel 2 receive address, lowest byte can be set, high bytes must equal RX_ADDR_P1[]
#define RX_ADDR_P3 0x0D //Data channel 3 receive address, lowest byte can be set, high bytes must equal RX_ADDR_P1[]
#define RX_ADDR_P4 0x0E //Data channel 4 receive address, lowest byte can be set, high bytes must equal RX_ADDR_P1[]
#define RX_ADDR_P5 0x0F //Data channel 5 receive address, lowest byte can be set, high bytes must equal RX_ADDR_P1[]
#define TX_ADDR 0x10 //Transmit address (low byte first), in ShockBurstTM mode, RX_ADDR_P0 equals this address
#define RX_PW_P0 0x11 //Receive data channel 0 valid data width (1~32 bytes), setting to 0 is invalid
#define RX_PW_P1 0x12 //Receive data channel 1 valid data width (1~32 bytes), setting to 0 is invalid
#define RX_PW_P2 0x13 //Receive data channel 2 valid data width (1~32 bytes), setting to 0 is invalid
#define RX_PW_P3 0x14 //Receive data channel 3 valid data width (1~32 bytes), setting to 0 is invalid
#define RX_PW_P4 0x15 //Receive data channel 4 valid data width (1~32 bytes), setting to 0 is invalid
#define RX_PW_P5 0x16 //Receive data channel 5 valid data width (1~32 bytes), setting to 0 is invalid
#define NRF_FIFO_STATUS 0x17 //FIFO status register; bit0:RX FIFO register empty flag; bit1:RX FIFO full flag; bit2~3 reserved
//bit4:TX FIFO empty flag; bit5:TX FIFO full flag; bit6:1,cyclically send last packet. 0,no cyclic
#define DYNPD 0x1C
#define FEATRUE 0x1D
//////////////////////////////////////////////////////////////////////////////////////////////////////////
//Bit definitions
#define MASK_RX_DR 6
#define MASK_TX_DS 5
#define MASK_MAX_RT 4
#define EN_CRC 3
#define CRCO 2
#define PWR_UP 1
#define PRIM_RX 0
#define ENAA_P5 5
#define ENAA_P4 4
#define ENAA_P3 3
#define ENAA_P2 2
#define ENAA_P1 1
#define ENAA_P0 0
#define ERX_P5 5
#define ERX_P4 4
#define ERX_P3 3
#define ERX_P2 2
#define ERX_P1 1
#define ERX_P0 0
#define AW_RERSERVED 0x0
#define AW_3BYTES 0x1
#define AW_4BYTES 0x2
#define AW_5BYTES 0x3
#define ARD_250US (0x00<<4)
#define ARD_500US (0x01<<4)
#define ARD_750US (0x02<<4)
#define ARD_1000US (0x03<<4)
#define ARD_2000US (0x07<<4)
#define ARD_4000US (0x0F<<4)
#define ARC_DISABLE 0x00
#define ARC_15 0x0F
#define CONT_WAVE 7
#define RF_DR_LOW 5
#define PLL_LOCK 4
#define RF_DR_HIGH 3
//bit2-bit1:
#define PWR_18DB (0x00<<1)
#define PWR_12DB (0x01<<1)
#define PWR_6DB (0x02<<1)
#define PWR_0DB (0x03<<1)
#define RX_DR 6
#define TX_DS 5
#define MAX_RT 4
//for bit3-bit1,
#define TX_FULL_0 0
#define RPD 0
#define TX_REUSE 6
#define TX_FULL_1 5
#define TX_EMPTY 4
//bit3-bit2, reserved, only '00'
#define RX_FULL 1
#define RX_EMPTY 0
#define DPL_P5 5
#define DPL_P4 4
#define DPL_P3 3
#define DPL_P2 2
#define DPL_P1 1
#define DPL_P0 0
#define EN_DPL 2
#define EN_ACK_PAY 1
#define EN_DYN_ACK 0
#define IRQ_ALL ( (1<<RX_DR) | (1<<TX_DS) | (1<<MAX_RT) )
uint8_t NRF24L01_Read_Reg( uint8_t RegAddr );
void NRF24L01_Read_Buf( uint8_t RegAddr, uint8_t *pBuf, uint8_t len );
void NRF24L01_Write_Reg( uint8_t RegAddr, uint8_t Value );
void NRF24L01_Write_Buf( uint8_t RegAddr, uint8_t *pBuf, uint8_t len );
void NRF24L01_Flush_Tx_Fifo ( void );
void NRF24L01_Flush_Rx_Fifo( void );
void NRF24L01_Reuse_Tx_Payload( void );
void NRF24L01_Nop( void );
uint8_t NRF24L01_Read_Status_Register( void );
uint8_t NRF24L01_Clear_IRQ_Flag( uint8_t IRQ_Source );
uint8_t RF24L01_Read_IRQ_Status( void );
uint8_t NRF24L01_Read_Top_Fifo_Width( void );
uint8_t NRF24L01_Read_Rx_Payload( uint8_t *pRxBuf );
void NRF24L01_Write_Tx_Payload_Ack( uint8_t *pTxBuf, uint8_t len );
void NRF24L01_Write_Tx_Payload_NoAck( uint8_t *pTxBuf, uint8_t len );
void NRF24L01_Write_Tx_Payload_InAck( uint8_t *pData, uint8_t len );
void NRF24L01_Set_TxAddr( uint8_t *pAddr, uint8_t len );
void NRF24L01_Set_RxAddr( uint8_t PipeNum, uint8_t *pAddr, uint8_t Len );
void NRF24L01_Set_Speed( nRf24l01SpeedType Speed );
void NRF24L01_Set_Power( nRf24l01PowerType Power );
void RF24LL01_Write_Hopping_Point( uint8_t FreqPoint );
void RF24L01_Set_Mode( nRf24l01ModeType Mode );
void NRF24L01_check( void );
uint8_t NRF24L01_TxPacket( uint8_t *txbuf, uint8_t Length );
uint8_t NRF24L01_RxPacket( uint8_t *rxbuf );
void NRF24L01_Gpio_Init( void );
void RF24L01_Init( void );
void Rocker_Mode(void);
char Get_NRF24L01_ConnectFlag(void);
void IRAM_ATTR BSP_IRQ_EXTI_IRQHANDLER(void* arg);
void gpio_get_irq_task(void);
#endif2
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Porting Verification
Write into the main.c file:
/*
* LCSC-Openkits (LCKFB) software and hardware materials and related expansion board software and hardware materials are all open source on the official website.
* Dev board official website: www.lckfb.com
* Technical support resides on the forum; any technical questions are welcome for exchange and learning at any time.
* LCKFB Forum: club.szlcsc.com
* Follow our Bilibili account: [LCSC-Openkits (LCKFB)] to keep up with our latest updates!
* We do not make money by selling boards; we take cultivating engineers as our mission.
* Change Logs:
* Date Author Notes
* 2024-01-10 LCKFB-lp first version
*/
#include <stdio.h>
#include "drv_spi.h"
#include "NRF24L01.h"
#include "main.h"
void app_main(void)
{
uint8_t g_RF24L01RxBuffer[30];
uint8_t NRF_FLAG = 0;
float t=0;
printf("Start......\r\n");
//SPI initialization
drv_spi_init( );
//RF24L01 pin initialization
NRF24L01_Gpio_Init( );
//Detect nRF24L01
NRF24L01_check( );
//NRF receive mode initialization
RF24L01_Init( );
#if RECEIVING_MODE
RF24L01_Set_Mode( MODE_RX );//NRF receive mode .
printf("MODE_RX\r\n");
#else
RF24L01_Set_Mode( MODE_TX );//NRF transmit mode
printf("MODE_TX\r\n");
#endif
while(1)
{
#if RECEIVING_MODE//NRF receive mode .
NRF_FLAG = NRF24L01_RxPacket( g_RF24L01RxBuffer ); //Receive bytes sent from nrf
if( NRF_FLAG > 5 )//Has data
{
printf("data = %s\r\n",g_RF24L01RxBuffer );//Output data
NRF_FLAG = 0;
}
#else //NRF transmit mode
NRF24L01_TxPacket((uint8_t*)"hello LCEDA\r\n",13);//NRF send data
printf("send\r\n");
delay_1ms(1000);
#endif
delay_ms(50);
}
}2
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Flash the transmitter code into one dev board, and the receiver code into another dev board.
Driver code:
File Download
📌 Materials Download Center (click to jump)
📌 In the Materials Download Center -> Module Porting Materials Download, inside the compressed package of this chapter.